Experience summary of joint simulation of Matlab and Modelsim through file reading and writing
Although the functionality of Modelsim is very powerful, the simulated waveform can be displayed in many forms, but when it comes to the simulation verification of the algorithm of digital signal processing, it is a bit lacking. The digital signal processing is the strength of Matlab. Not only does it have a large number of functions related to digital signal processing, but also the graphic display function is very powerful. Therefore, when doing FPGA verification of digital signal processing algorithms, the speed of algorithm verification is greatly accelerated by using Matlab. . On the joint simulation of Matlab and Modelsim, I saw two methods from the Internet, one is to establish the joint simulation interface of Matlab and Modelsim through Link for Modelsim; the other is to realize the joint simulation of Matlab and Modelsim through file reading and writing. I have not studied the first method carefully. I probably looked at it. I feel that the process is more complicated, but the function is definitely very powerful. There is an article on the link for Modelsim "target=_blank>. Interested friends can go see it. A look. The second method, only through a few file reading and writing functions can be achieved, and basically can meet the requirements of the current simulation, so here mainly discuss the method I use, I hope to be able to throw bricks, because I can only be a beginner. When the FPGA performs algorithm verification, it is often necessary to input simulation data, which can be generated by the FPGA. However, if the data generation process is complicated, it takes a lot of effort and the accuracy of the generated data cannot be guaranteed. For example, if you want to verify the relevant algorithm of a communication receiver, then we need to generate the transmission data first, that is, we must first make a transmitter. If this process is also implemented by the FPGA, it is also a complicated process. At this time, we can use Matlab to use the various functions that come in Matlab to generate the required signals. After the fixed point, it is used as the input signal of the FPGA receiving module. This will undoubtedly save a lot of time and effort. Matlab's processing of Modelsim simulation data is also realized by file reading and writing. That is, through the Verilog statement, a certain signal in the simulation process is written into the file, and then the data of the file is read out in Matlab, and the analysis can be performed in Matlab. The above is some of my experiences on co-simulation of Matlab and Modesim. If you have other better methods, I hope you will be enlightened! Police Megaphone,High Power Megaphone,Rechargeable Megaphone,High Power Megaphone With Microphone Shangqiu Huayitong electronic technology co., Ltd. , https://www.huayitongmegaphones.com
Let's use a simple example to illustrate how to use the data generated by Matlab as a Modelsim simulation.
First use matlab to generate a 256-point 8-bit sine wave data, and then write the sin.txt file in hexadecimal format N = 256;
n = 1:256;
x = fix(128 + (2^7 - 1) * sin(2*pi*n/N));
Fid = fopen('sin.txt','wt');
Fprintf(fid, '%x', x);
Fclose(fid);
The following figure is the content of the intercepted generated data file.
[[wysiwyg_imageupload:33:]]
Then copy the generated sin.txt file to the Modelsim project, first define an 8-bit X 256 array in the Verilog file, and then read the data in the file through the $readmemh command. The relevant Verilog code is as follows:
Reg [7:0] data_mem[0:255]; //Define an array of 8bit X 256
iniTIal
Begin
$readmemh("sin.txt",data_mem); //Read the data in sin.txt into memory data_mem
End
For the usage of $readmemh, see the Verilog reference book, which is not detailed here.
You can use data_mem as your test data later. For example, the data of data_mem can be sent to data_out by the following code:
Always @(posedge clk)
Begin
If(rst)
Begin
Data_out <= 8'd0;
i <= 8'd0;
End
Else
Begin
Data_out <= data_mem[i]; //output the data in the memory i <= i + 8'd1;
End
End
In this way, a sine wave waveform can be output by using data_out. The following figure is a sine wave waveform generated by Molesim simulation:
The following figure also illustrates the whole process with a simple example.
The following Verilog statement implements writing data of the signal data_out to the data_out.txt file integer w_file;
iniTIal w_file = $fopen("data_out.txt");
Always @(i)
Begin
$fdisplay(w_file,"%h",data_out);
If(i == 8'd255) //Write a total of 256 data $stop;
End
The following figure is part of the intercepted data_out.txt:
[[wysiwyg_imageupload:34:]]
Then you can compile a small Matlab program to read the data in data_out.txt for analysis. The following Matlab program reads the data and displays the waveform of the data through the graph.
Fid = fopen('data_out.txt','r');
For i = 1 : 256;
Num(i) = fscanf(fid, '%x', 1); The meaning of % means to read a data in hexadecimal from the file pointed to by fid.
End
Fclose(fid);
Plot(num);
Pay attention to two points when using the fscanf function.
First: ensure that the data format read and the data format saved in the file are the same. For example, the format saved in this file is hexadecimal, so it should be read in hexadecimal form when reading.
Second: Make sure that the number of data in the file is consistent with the number of read settings (here 256). For example, to remove the extra line breaks in the generated file data_out.txt (generally there will be one more line at the end), otherwise Matlab will treat the empty line as a data, so that the two numbers are inconsistent, resulting in Matlab error.
The following figure shows Matlab reading out the data in data_out.txt and displaying the waveform:
[[wysiwyg_imageupload:35:]]
Of course, with the powerful tool Matlab, you can easily see the spectrum of the signal and other information.
In addition, there is a lot of ways to write data to a file via Verilog. The above uses the $fdisplay system function. Of course, there are several commands such as $fmonitor and $fwrite. Let's briefly talk about these commands. s difference.
$fdisplay
This command requires a trigger condition to write data to the file. For example, the trigger condition in the above example is always(i), which is written when i changes. A newline is automatically added each time the data is written.
$fmonitor
This command does not require a trigger condition and can be written to the file as long as there is a change. For example, the following statement can be used:
iniTIal $fmonitor(w_file,"%h",data_out);
This will write the data_out data generated by the entire simulation process into the file.
$fwrite
This command is basically the same as $fdisplay, and requires a trigger condition to be written. The difference is that no line break is automatically added for every data written. For example, the following statement can be used:
Always @(posedge clk)
Begin
$fwrite(w_file,"%h",data_out);
End
For a detailed introduction to these commands, you can refer to the relevant data of Verilog.
A brief summary of the several functions used above:
The functions about Matlab are: fopen, fscanf, fclose.
The functions for Modelsim are: $fopen, $fclose, $readmemh, $readmemb, $fmonitor, $fdisplay, $fwrite.